1. Field of the Invention
The present invention relates to an apparatus for calibrating termination voltage of an on-die termination.
2. Description of the Prior Art
As generally known in the art, when pulses or signals (hereinafter, referred to as “signals”) delivered through a bus line having a predetermined value of impedance meet a bus line having different impedance, some of the signals are reflected. An on-die termination (hereinafter, referred to as “ODT”) means a device used for reducing the signal reflection.
As well known in the art, a semiconductor device such as a memory device exchanges data with an external system. If impedance of a bus line linking the semiconductor device with the external system is different from impedance of a signal line in the semiconductor device directly connected to the bus line, data may be reflected. Recently, in order to prevent the data reflection, an impedance matching device is usually provided to a high-speed semiconductor device. A circuit used for impedance matching is the ODT.
Recently, the ODT has been provided to a DDR2 SDRAM operating at a high speed in order to prevent signal reflection.
In an operation of the ODT, if a predetermined control signal is applied to an ODT pin from a memory controller, termination voltage Vtt of about VDDQ/2 is driven into the interior of the semiconductor device by a voltage divider of the semiconductor device. Herein, an ODT resistance value selected by EMRS is 70 ohm or 150 ohm. The resistance value may change according to semiconductor devices.
FIG. 1 is a typical circuit diagram for explaining a concept of the on-die termination.
In FIG. 1, it is preferred that termination voltage Vtt of a line ZQ is VDDQ/2. Therefore, the termination voltage is exactly VDDQ/2 only when resistance values R1 and R2 employed by voltage dividers 10 and 11, respectively, are identical to each other.
For this reason, various circuits for controlling the termination voltage are provided.